Sony PCV-L400 Manual do Utilizador descarregar pdf (Página 78)

VAIO Computer Reference Manual

70

CHIPSET FEATURES SETUP Screen

SDRAM Configuration: [By SPD]

Disabled

7ns (143MHz)

8ns (125MHz)

SDRAM CAS Latency: [2T]

3T

SDRAM RAS to CAS Delay:

*

[2T]

3T

SDRAM RAS Precharge Time:

*

[2T]

3T

DRAM Idle Timer:

*

[10T]

12T

16T

32T

Infinite

0T

2T

4T

8T

SDRAM MA Wait State: [Normal]

Slow

Fast

Snoop Ahead: [Enabled]

Disabled

Host Bus Fast Data Ready: [Disabled]

Enabled

16-bit I/O Recovery Time: [1 BUSCLK]

2 BUSCLK

3 BUSCLK

4 BUSCLK

8-bit I/O Recovery Time: [1 BUSCLK]

2 BUSCLK

3 BUSCLK

4 BUSCLK

5 BUSCLK

6 BUSCLK

7 BUSCLK

8 BUSCLK

* These settings depend on the setting in SDRAM Configuration, and become enabled only when

SDRAM Configuration is Disabled.

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